1. Field of the Invention
This invention relates to electronic circuits that drive power (often amplified) to output loads. It relates to a class of circuit implementations often called pulse width modulation (PWM). In particular, the input power corresponds to audio signals and the output loads are audio loads such as speakers and headphones. PWM can also be applied to other circuits like DC-DC converters where input power are DC voltages and output loads are some other circuits that require a power supply.
2. Prior Art
Most digital implementations of pulse width modulation mimics the way traditional PWM is done in analog circuits, i.e., by generating a staircase triangular waveform and comparing the generated waveform with the input waveform. The output waveform is often a binary signal (driving the load single-endedly or differentially) or a ternary signal (driving the load differentially). Output resolution is limited by the step-size of the triangular waveform which in turn is limited by the clock speed used for its generation. To obtain high resolution, an extremely fast clock (in the GHz range) is required, which may not be practical for most applications.
In pulse width modulation, signal values are encoded in the duty cycles of a rectangular waveform of a fixed period P. Duty cycle, represented in percentage, is defined as the active duration of a pulse (during which a constant power is delivered) divided by P. For example, a duty cycle of 30% means that power is delivered 30% of the time. Defining full scale signal (i.e. 100% duty cycle) to be 1, the “pulse value” K=duty cycle×full scale value (FIG. 1). Varying the duty cycle over time will result in time-varying power supplied to an audio load that generates audible signals.
To achieve negative pulse values, differential schemes are used. Two different signals, P and N, are connected across the 2 terminals of an output load. Power delivered to the load is proportional to P−N, which can be positive, negative or zero (essentially a ternary signal, FIG. 2). Differential schemes generally have better performance than single-ended schemes.
In most digital implementations, a digital (staircase) triangular wave T is generated (FIG. 3). The frequency of T is called the carrier frequency and is often referred to as fcarrier.
The input signal is then sampled at the peaks and troughs of the triangular wave to produce a sampled signal S. S is then compared to T to generate P and −S is compared to T to generate N (FIG. 4). As seen in FIG. 4, the position of rising edge and the position of falling edge of a single pulse are controlled by 2 different samples. This 2-samples-per-pulse scheme removes any odd harmonics in the resulting output and is thus superior to 1-sample-per-pulse scheme (where input signal is only sampled at either the peaks or the troughs of T).
Quantization errors arise when the input values fall between any 2 quantized steps in the triangular wave T. For example, in a single-ended scheme, if T has 10 steps and S=0.623, it will produce an output with 60% duty cycle (K=0.6). The difference E=S−K=0.623−0.6=0.023 is the quantization error and it contributes to noise and degrades the performance.
One solution is to increase the clock speed so that a triangular wave with finer step-sizes can be generated. Finer step sizes reduce the maximum quantization error and improve performance
Other solutions make use of noise-shaping loops to quantize the signal before pulse width modulating it to a PWM waveform.
Another solution is to put in some hysteresis in the quantizer of a sigma delta modulator.
This invention allows resolution to be improved by using variable pulse periods.